Large register-level technical drawing (59" x 22") of MU5. Shows the data and address highways and the four associative buffer stores (the IBU jump queue, the PROP name store, the OBS name store and the SAC current page registers
MU5 CPU overall diagram, issue 1, 17th February 1971
- Reference
- GB 133 ESF/54
- Dates of Creation
- 1971